DocumentCode :
2354670
Title :
Regular processor arrays
Author :
Malony, Allen D.
Author_Institution :
Center for Supercomput. Res. & Dev., Illinois Univ., Urbana-Champaign, IL, USA
fYear :
1988
fDate :
10-12 Oct 1988
Firstpage :
499
Lastpage :
502
Abstract :
The author defines regularity for processor array structures in two dimensions and enumerates eleven distinct regular topologies. The analysis of the regular processor arrays is based on their ability to emulate the other members of the class. Space and time emulation schemes among the regular processor arrays are constructed to compare their geometric and performance characteristics. The hexagonal array is shown to have the most efficient emulation capabilities
Keywords :
parallel architectures; virtual machines; hexagonal array; performance characteristics; processor array structures; regular processor arrays; regular topologies; regularity; time emulation; Emulation; Fault tolerance; Geometry; Hypercubes; Network topology; Parallel algorithms; Parallel processing; Process design; Scalability; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Frontiers of Massively Parallel Computation, 1988. Proceedings., 2nd Symposium on the Frontiers of
Conference_Location :
Fairfax, VA
Print_ISBN :
0-8186-5892-4
Type :
conf
DOI :
10.1109/FMPC.1988.47485
Filename :
47485
Link To Document :
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