Effect of substrate resistivity on switching noise in on-chip power distribution networks

Author

Mao, Lifeng ; Swaminathan, Madhavan ; Libous, James ; Connor, Daniel O.

fYear

2003

fDate

27-29 Oct. 2003

Firstpage

33

Lastpage

36

Abstract

This paper describes the effect of substrate loss on simultaneous switching noise (SSN) in on-chip power distribution networks (PDN). Conformal mapping and first-order Debye approximation based Finite Difference Time Domain (FDTD) have been used for model extraction and time domain simulation with frequency dependent parameters, respectively. The importance of substrate loss on power supply noise has been quantified in this paper.

Keywords

computer power supplies; conformal mapping; finite difference time-domain analysis; integrated circuit noise; power integrated circuits; power supply circuits; switching; FDTD; conformal mapping; first-order Debye approximation; frequency dependent parameters; model extraction; on-chip power distribution networks; power supply noise; simultaneous switching noise; substrate loss; substrate resistivity; time domain simulation; Conductivity; Conformal mapping; Coplanar waveguides; Finite difference methods; Frequency dependence; Intelligent networks; Network-on-a-chip; Power systems; Semiconductor device noise; Substrates;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical Performance of Electronic Packaging, 2003

Conference_Location

Princeton, NJ, USA

Print_ISBN

0-7803-8128-9

Type

conf

DOI

10.1109/EPEP.2003.1249994

Filename

1249994