DocumentCode
2363045
Title
Aspects and solutions to designing standard LVCMOS I/O buffers in 90nm process
Author
Kannan, Prasanna ; Raghunathan, K.S. ; Jayaraman, S.
Author_Institution
Insilica Semicond. Pvt. Ltd., Bangalore
fYear
2007
fDate
26-28 Sept. 2007
Firstpage
1
Lastpage
7
Abstract
Low voltage complementary metal oxide semiconductor (LVCMOS) buffers provide single ended IO interface to the external devices in system on chip (SoC) designs. This paper covers functional operations of basic blocks of the LVCMOS output buffer and input buffer in detail and the design considerations and challenges at each phase of the design. It also explains how the phenomena such as the hot carrier effect, gate oxide integrity and the like affect the performance and reliability of the buffer and the techniques employed to cope with the effects.
Keywords
CMOS integrated circuits; low-power electronics; nanoelectronics; system-on-chip; size 90 nm; standard LVCMOS I/O buffers; system on chip designs; CMOS process; Capacitors; Costs; Design optimization; Driver circuits; Low voltage; Manufacturing processes; System-on-a-chip; Threshold voltage; Transmitters; Hysterisis; JEDEC Standard; LVCMOS Transmitter; Level converter; Pre-driver; Receiver; Transmission line;
fLanguage
English
Publisher
ieee
Conference_Titel
AFRICON 2007
Conference_Location
Windhoek
Print_ISBN
978-1-4244-0987-7
Electronic_ISBN
978-1-4244-0987-7
Type
conf
DOI
10.1109/AFRCON.2007.4401475
Filename
4401475
Link To Document