Analog decoders and receivers for high speed applications

Author

Hagenauer, Joachim ; Moerz, Matthias ; Schaefer, Andrew

Author_Institution

Lehrstuhl fur Nachrichtentechnik, Technische Univ. Munchen, Germany

fYear

2002

fDate

2002

Firstpage

42430

Lastpage

42437

Abstract

The ever increasing speed of data transmission, especially in optical channels, in magnetic recording devices and in wireless links, makes it necessary to look at new receiver structures which are capable of high speed processing at low power consumption. Analog, nonlinear and highly parallel operating circuits can perform the tasks of equalization, differential detection, channel decoding and, in some cases, of source decoding which are normally assigned to digital processors and circuits. The first prototype analog VLSI chips of simple decoder components are available and perform well at speeds up to 10 Gbit/s

Keywords

VLSI; analogue processing circuits; data communication equipment; decoding; differential detection; equalisers; high-speed integrated circuits; power consumption; receivers; FEC decoding; analog VLSI chips; analog decoders; analog receivers; channel decoding; data transmission; differential detection; equalization; high speed processing; magnetic recording devices; nonlinear circuits; optical channels; parallel operating circuits; power consumption; source decoding; turbo decoding; wireless links; Circuits; Data communication; Decoding; High speed optical techniques; Magnetic recording; Nonlinear optical devices; Nonlinear optics; Optical devices; Optical receivers; Optical recording;

fLanguage

English

Publisher

ieee

Conference_Titel

Broadband Communications, 2002. Access, Transmission, Networking. 2002 International Zurich Seminar on

Conference_Location

Zurich

Print_ISBN

0-7803-7257-3

Type

conf

DOI

10.1109/IZSBC.2002.991743

Filename

991743