DocumentCode :
2364849
Title :
Robust Circuit Design: Challenges and Solutions
Author :
Tiwary, Saurabh K. ; Singhee, Amith ; Chandra, Vikas
Author_Institution :
Cadence Res. Labs., Berkeley, CA
fYear :
2009
fDate :
5-9 Jan. 2009
Firstpage :
41
Lastpage :
42
Abstract :
Scaling with Moore´s law is taking us to feature sizes of 32nm and smaller. At these technology nodes designers are faced with an explosion in design complexity at all levels. In this tutorial we discuss three somewhat novel and particularly confounding dimensions of this complexity; electrical complexity, manufacturing complexity and reliability complexity.
Keywords :
circuit reliability; integrated circuit design; Moore´s law; confounding dimensions; electrical complexity; manufacturing complexity; reliability complexity; robust circuit design; size 32 nm; technology nodes designers; Adders; Circuit synthesis; Design automation; Design optimization; Lithography; Manufacturing; Research and development; Robustness; Switches; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 2009 22nd International Conference on
Conference_Location :
New Delhi
ISSN :
1063-9667
Print_ISBN :
978-0-7695-3506-7
Type :
conf
DOI :
10.1109/VLSI.Design.2009.119
Filename :
4749650
Link To Document :
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