DocumentCode
2365152
Title
900 MHz band class E PA using high voltage n-channel transistors in standard CMOS technology
Author
Herrera, J.A. ; del Valle, J.L.
Author_Institution
Electron. Design Group, Mexico City, Mexico
fYear
2005
fDate
7-9 Sept. 2005
Firstpage
400
Lastpage
403
Abstract
The operation of a single ended CMOS class E power amplifier imposes voltage stresses on the drain terminal of the switching transistor that preclude the use of large bias drain voltages. On this paper, it is presented a design of a high voltage n-channel transistor compatible with CMOS technology that avoids the above limitation. A design methodology based on physical models, which allows the comparison of class E power amplifiers performance, is also presented for the low voltage versus the high voltage options. Simulation results using BSIM3 V3.2, including components losses and a finite feed inductor topology, show that the high voltage approach is the best option to meet an output power design specification of 25 dBm at 900 MHz.
Keywords
CMOS integrated circuits; power amplifiers; power integrated circuits; 900 MHz; BSIM3 V3.2; CMOS RF; CMOS technology; class E operation; drain terminal; finite feed inductor topology; high voltage CMOS; high voltage n-channel transistor; large bias drain voltage; output power design specification; power amplifier; switching transistor; voltage stress; CMOS technology; Design methodology; Feeds; High power amplifiers; Inductors; Low voltage; Operational amplifiers; Power amplifiers; Semiconductor device modeling; Stress; CMOS RF; Power amplifiers; class E operation; high voltage CMOS;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Electronics Engineering, 2005 2nd International Conference on
Print_ISBN
0-7803-9230-2
Type
conf
DOI
10.1109/ICEEE.2005.1529654
Filename
1529654
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