DocumentCode
236743
Title
Electromagnetic simulation of 3D stacked ICs: Full model vs. S-parameter cascaded based model
Author
Piersanti, Stefano ; de Paulis, Francesco ; Ciccomancini Scogna, A. ; Swaminathan, Madhavan ; Orlandi, Antonio
Author_Institution
UAq EMC Lab., Univ. of L´Aquila, L´Aquila, Italy
fYear
2014
fDate
4-8 Aug. 2014
Firstpage
57
Lastpage
62
Abstract
Three-dimensional electromagnetic simulation models are often simplified and/or segmented in order to reduce the simulation time and memory requirements without sacrificing the accuracy of the results. This paper investigates the difference between full model and S-parameter cascaded based model of 3D stacked ICs with the presence of Through Silicon Vias. It is found that the simulation of the full model is required for accurate results, however, a divide and conquers (segmentation) approach can be used for preliminary post layout analysis. Modeling guidelines are discussed and details on the proper choice of ports, boundary conditions, and solver technology are highlighted. A de-embedding methodology is finally explored to improve the accuracy of the cascaded/segmented results.
Keywords
divide and conquer methods; integrated circuits; 3D stacked IC; S-parameter cascaded based model; electromagnetic simulation; post layout analysis; three-dimensional electromagnetic simulation models; through silicon vias; Computational modeling; Integrated circuit modeling; Load flow; Ports (Computers); Solid modeling; Three-dimensional displays; Three-dimensional integrated circuit (3D-IC); block cascading; de-embedding; power integrity; signal integrity; through silicon via (TSV);
fLanguage
English
Publisher
ieee
Conference_Titel
Electromagnetic Compatibility (EMC), 2014 IEEE International Symposium on
Conference_Location
Raleigh, NC
Print_ISBN
978-1-4799-5544-2
Type
conf
DOI
10.1109/ISEMC.2014.6898943
Filename
6898943
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