DocumentCode :
2367439
Title :
From the future Si technology perspective: Challenges and opportunities
Author :
Kim, Kinam
Author_Institution :
SAIT, Samsung Electron. Co., Yongin, South Korea
fYear :
2010
fDate :
6-8 Dec. 2010
Abstract :
As silicon technology enters sub-20nm nodes, new materials, structures and processes are being introduced in order to continue with the advantages of dimensional scaling, e.g, 3D NAND, ReRAM, EUVL, etc. Beyond 10 nm, Si CMOS technology will remain as the mainstream. In this paper, key drivers for silicon-based nano-electronics as well as research directions will be reviewed from viewpoints of system, memory, logic and emerging Si technologies.
Keywords :
CMOS logic circuits; CMOS memory circuits; elemental semiconductors; nanoelectronics; silicon; 3D NAND; EUVL; ReRAM; Si; dimensional scaling; silicon CMOS technology; silicon-based nanoelectronics;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting (IEDM), 2010 IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0163-1918
Print_ISBN :
978-1-4424-7418-5
Electronic_ISBN :
0163-1918
Type :
conf
DOI :
10.1109/IEDM.2010.5703274
Filename :
5703274
Link To Document :
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