Title :
Charge-recovery power clock generators for adiabatic logic circuits
Author :
Arsalan, Muhammad ; Shams, Maitham
Author_Institution :
Dept. of Electron., Carleton Univ., Ottawa, Ont., Canada
Abstract :
To get maximum energy efficiency from adiabatic logic circuits several charge-recovery power clock generators (PCGs) have been published in recent years. This paper compares and analyzes the performance and energy efficiency of various PCGs in a uniform test environment. The test benches are laid out in a standard 0.18 μm CMOS technology and the results are mainly based on post layout simulations.
Keywords :
CMOS logic circuits; circuit simulation; clocks; logic circuits; 0.18 micron; CMOS technology; adiabatic logic circuits; charge recovery; energy efficiency; post layout simulations; power clock generators; CMOS technology; Circuit simulation; Circuit testing; Clocks; Energy consumption; Energy efficiency; Logic circuits; Logic gates; Power dissipation; Power generation;
Conference_Titel :
VLSI Design, 2005. 18th International Conference on
Print_ISBN :
0-7695-2264-5
DOI :
10.1109/ICVD.2005.64
