• DocumentCode
    2369124
  • Title

    Floorplan-based crosstalk estimation for macrocell-based designs

  • Author

    Gupta, Suvodeep ; Katkoori, Srinivas ; Sankaran, Hariharan

  • Author_Institution
    Dept. of Comput. Sci. & Eng., South Florida Univ., Tampa, FL, USA
  • fYear
    2005
  • fDate
    3-7 Jan. 2005
  • Firstpage
    463
  • Lastpage
    468
  • Abstract
    We propose an estimation technique to measure the crosstalk susceptibility of different nets in the post global routing phase, prior to detailed routing of designs. Global routing provides the approximate routes of the wires. This is used to compute the aggressors of a given victim wire along its route and its crosstalk susceptibility with respect to those aggressors. The crosstalk susceptibility of a victim wire is given by: (1) Pt the probability of crosstalk occurrence on the wire in different regions along its route; and (2) Vpeak worst case noise amplitude experienced by the wire along its route. Pt is estimated using a very fast and accurate statistical estimator previously proposed by the authors. Vpeak is estimated by predicting the cross-coupling capacitances between neighboring wires, using their global routing information. Placement and global routing are done using CADENCE silicon ensemble. The predicted crosstalk estimates are compared against those by detailed HSPICE simulations. Average errors are found to be less than 8% while the execution times are significantly reduced.
  • Keywords
    SPICE; circuit layout CAD; circuit simulation; crosstalk; integrated circuit layout; network routing; CADENCE silicon ensemble; HSPICE simulations; cross-coupling capacitances; crosstalk susceptibility; floorplan based crosstalk estimation; global routing phase; macrocell-based designs; noise amplitude; placement routing; statistical estimation; wire routes; Capacitance; Crosstalk; Noise level; Phase estimation; Phase measurement; Predictive models; Probability; Routing; Silicon; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, 2005. 18th International Conference on
  • ISSN
    1063-9667
  • Print_ISBN
    0-7695-2264-5
  • Type

    conf

  • DOI
    10.1109/ICVD.2005.100
  • Filename
    1383319