DocumentCode
236946
Title
Conducted-emission modeling for a high-speed ECL clock buffer
Author
Shuai Jin ; Yaojiang Zhang ; Yan Zhou ; Yadong Bai ; Xuequan Yu ; Jun Fan
Author_Institution
Missouri S&T EMC Lab., Rolla, MO, USA
fYear
2014
fDate
4-8 Aug. 2014
Firstpage
594
Lastpage
599
Abstract
Total voltage sources and Thevenin equivalent circuits are derived by measurements and simulations using IBIS models to characterize the conducted emissions from ICs. The constructed noise source model for a test IC is applied in system-level simulations and the calculated far field radiation is validated with measurements. The agreement between simulated and measured results demonstrates the effectiveness of the constructed model for characterizing the conducted emissions from an IC´s I/O pins.
Keywords
buffer circuits; clocks; emitter-coupled logic; equivalent circuits; I-O pins; IBIS models; Thevenin equivalent circuits; conducted-emission modeling; far field radiation; high-speed ECL clock buffer; input-output buffer information specification; noise source model; system-level simulations; test IC; total voltage sources; Clocks; Harmonic analysis; Integrated circuit modeling; Load modeling; Noise; Voltage measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Electromagnetic Compatibility (EMC), 2014 IEEE International Symposium on
Conference_Location
Raleigh, NC
Print_ISBN
978-1-4799-5544-2
Type
conf
DOI
10.1109/ISEMC.2014.6899040
Filename
6899040
Link To Document