DocumentCode
2369733
Title
A 1.3GSample/s 10-tap full-rate variable latency self-timed FIR filter with clocked interfaces
Author
Tierno, J. ; Rylyakov, A. ; Rylov, S. ; Singh, M. ; Ampadu, P. ; Nowick, S. ; Immediato, M. ; Gowda, S.
Author_Institution
IBM T J. Watson Research Center
Volume
2
fYear
2002
fDate
7-7 Feb. 2002
Firstpage
42
Lastpage
393
Keywords
Circuits; Clocks; Delay; Disk drives; Finite impulse response filter; Independent component analysis; Pipelines; Power supplies; Protocols; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-7803-7335-9
Type
conf
DOI
10.1109/ISSCC.2002.992100
Filename
992100
Link To Document