DocumentCode
236990
Title
Checking PCB design electrically for PI/SI issues
Author
Kai Xiao ; Su, Tao ; Hsu, John ; Weifeng Shu ; Xiaoning Ye ; Yuan-Liang Li
Author_Institution
Intel Corp., DuPont, WA, USA
fYear
2014
fDate
4-8 Aug. 2014
Firstpage
712
Lastpage
716
Abstract
In this paper, the signal integrity (SI) simulation and computer system electrical design flow is discussed. Traditionally, the SI analyses lead to a set of physical design rules that the printed-circuit board (PCB) and integrated circuit (IC) package designers rigorously follow in the layout to ensure the signaling performance meets the requirements. Such practice makes the signaling requirements intuitive to the layout engineers. But, at the same time, it may also reduce the design flexibility and limit innovation. To bridge the gap between physical design and signaling performance, the concept, ingredients, and flow of an electrical design checker is introduced and described in detail. The flow has been applied to the various designs, and results are discussed.
Keywords
integrated circuit design; printed circuit layout; PCB design; design flexibility; electrical design flow; integrated circuit design; physical design rules; power integrity; printed circuit board; signal integrity; signaling performance; Couplings; Crosstalk; Layout; Measurement; Routing; Silicon; Stripline; Printed circuit board; power integrity; signal integrity;
fLanguage
English
Publisher
ieee
Conference_Titel
Electromagnetic Compatibility (EMC), 2014 IEEE International Symposium on
Conference_Location
Raleigh, NC
Print_ISBN
978-1-4799-5544-2
Type
conf
DOI
10.1109/ISEMC.2014.6899061
Filename
6899061
Link To Document