DocumentCode :
2370290
Title :
High performance CMOS-compatible super-junction FINFETs for Sub-100V applications
Author :
Yoo, Abraham ; Ng, Wai Tung ; Sin, Johnny K O ; Wai Tung Ng
Author_Institution :
Dept. of Mater. Sci. & Eng., Univ. of Toronto, Toronto, ON, Canada
fYear :
2010
fDate :
6-8 Dec. 2010
Abstract :
A novel lateral super-junction power FINFET (SJ-FINFET) structure suitable for integration is presented to address the challenges associated with sub-100V applications. The proposed lateral SJ-FINFET structure is compatible with advanced SOI-CMOS and FINFET fabrication technologies. It employs a 3D corrugated MOS channel and alternating n/p drift region pillars to achieve a 30% reduction in specific on-resistance when compared to conventional planar gate SJ-LDMOSFETs.
Keywords :
CMOS integrated circuits; power MOSFET; power integrated circuits; silicon-on-insulator; 3D corrugated MOS channel; FINFET fabrication technology; SOI-CMOS fabrication technology; high performance CMOS-compatible superjunction FINFET; n-p drift region pillars; planar gate SJ-LDMOSFET; power SJ-FINFET structure; specific on-resistance reduction;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting (IEDM), 2010 IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0163-1918
Print_ISBN :
978-1-4424-7418-5
Electronic_ISBN :
0163-1918
Type :
conf
DOI :
10.1109/IEDM.2010.5703402
Filename :
5703402
Link To Document :
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