DocumentCode
2371908
Title
Study and design of synchronized phasor measurement unit
Author
Chang, Xianrong ; Wang, Xuan
Author_Institution
Sch. of Electr. Eng., North China Electr. Power Univ., Baoding, China
fYear
2012
fDate
23-25 March 2012
Firstpage
434
Lastpage
435
Abstract
This paper introduces a new type of synchronized phasor measurement unit based on digital signal processor, including function of each module, hardware design and subprogram structure.
Keywords
digital signal processing chips; phasor measurement; signal processing equipment; digital signal processor; hardware design; subprogram structure; synchronized phasor measurement unit; Digital signal processing; Digital signal processors; Global Positioning System; Phasor measurement units; Power system stability; Random access memory; Synchronization;
fLanguage
English
Publisher
ieee
Conference_Titel
Information Science and Technology (ICIST), 2012 International Conference on
Conference_Location
Hubei
Print_ISBN
978-1-4577-0343-0
Type
conf
DOI
10.1109/ICIST.2012.6221684
Filename
6221684
Link To Document