• DocumentCode
    2371999
  • Title

    Strongly fail-safe interfaces based on concurrent checking

  • Author

    Nicolaidis, M.

  • Author_Institution
    Reliable Integrated Syst. Group, Inst. Nat. Polytech. de Grenoble, France
  • fYear
    1994
  • fDate
    15-17 Nov 1994
  • Firstpage
    45
  • Lastpage
    50
  • Abstract
    This paper presents a strongly fail safe interface which transforms binary signals, generated by a system with error detection capabilities and eventually with fault tolerant capabilities, into fail safe signals. That is to say into signals which in the presence of failures will be either correct or safe. The strongly fail-safe property is achieved by means of concurrent checking techniques. The interest of this interface is that it can be implemented in VLSI, while the conventional fail-safe interfaces require to use discrete components
  • Keywords
    VLSI; digital integrated circuits; fault location; logic design; logic testing; VLSI; binary signals; concurrent checking; duplicated processing; error detection; fail safe signals; fault tolerant capabilities; strongly fail-safe interfaces; triplicated processing; Actuators; Circuit faults; Control systems; Discrete transforms; Fault detection; Fault tolerant systems; Logic; Signal generators; Testing; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Symposium, 1994., Proceedings of the Third Asian
  • Conference_Location
    Nara
  • Print_ISBN
    0-8186-6690-0
  • Type

    conf

  • DOI
    10.1109/ATS.1994.367255
  • Filename
    367255