DocumentCode
2372476
Title
A 6.5GHz 130nm single-ended dynamic ALU and instruction scheduler loop
Author
Anders, M. ; Mathew, S. ; Bloechel, B. ; Thompson, S. ; Krishnamurthy, R. ; Soumyanath, K. ; Borkar, S.
Author_Institution
Microprocessor Research Labs
Volume
2
fYear
2002
fDate
7-7 Feb. 2002
Firstpage
332
Lastpage
534
Keywords
CMOS technology; Dynamic scheduling; Logic circuits; Logic design; Microprocessors; Processor scheduling; RF signals; Radio frequency; Signal design; Signal generators;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-7803-7335-9
Type
conf
DOI
10.1109/ISSCC.2002.992281
Filename
992281
Link To Document