DocumentCode
2374271
Title
Design and implementation of a BISD scheme
Author
Sun, Xiaoling ; Ellert, Dennis
Author_Institution
Dept. of Electr. & Comput. Eng., Alberta Univ., Edmonton, Alta., Canada
Volume
2
fYear
1997
fDate
25-28 May 1997
Firstpage
728
Abstract
This paper describes the design and implementation of a novel built-in self-diagnosis (BISD) scheme for IC-level scan-based circuits. The proposed scheme is capable of identifying all flip-flops that have captured erroneous circuit responses during a test, independent of the number of errors in the circuit response sequences and the number of defects in a circuit
Keywords
VLSI; automatic testing; boundary scan testing; built-in self test; fault diagnosis; flip-flops; logic testing; sequential circuits; BISD scheme; IC-level scan-based circuits; built-in self-diagnosis; circuit defects; circuit response sequences; erroneous circuit responses; flip-flops; Built-in self-test; Circuit faults; Circuit testing; Clocks; Error correction codes; Fault diagnosis; Flip-flops; Manufacturing; Shift registers; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Computer Engineering, 1997. Engineering Innovation: Voyage of Discovery. IEEE 1997 Canadian Conference on
Conference_Location
St. Johns, Nfld.
ISSN
0840-7789
Print_ISBN
0-7803-3716-6
Type
conf
DOI
10.1109/CCECE.1997.608343
Filename
608343
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