DocumentCode :
2374813
Title :
A 5GHz fully integrated super-regenerative receiver with on-chip slot antenna in 0.13μm CMOS
Author :
Shi, Dan ; Behdad, Nader ; Chen, Jia-Yi ; Flynn, Michael P.
Author_Institution :
Michigan Univ., Ann Arbor, MI
fYear :
2008
fDate :
18-20 June 2008
Firstpage :
34
Lastpage :
35
Abstract :
A single chip receiver based on super-regeneration incorporates an on-chip slot antenna and digital received data synchronization. A capacitively-loaded standing-wave resonator improves energy efficiency. An all-digital PLL timing scheme synchronizes the received data clock. The prototype 5 GHz receiver, implemented in 0.13 mum CMOS, achieves a data rate of up to 1.2 Mb/s, dissipates 6.6 mW from a 1.5 V supply, and occupies a die area of 2.4 mm2.
Keywords :
CMOS digital integrated circuits; field effect MMIC; microwave receivers; phase locked loops; slot antennas; CMOS integrated circuit; all-digital PLL timing; capacitively-loaded resonator; digital received data synchronization; frequency 5 GHz; integrated super-regenerative receiver; microwave receiver; on-chip slot antenna; power 6.6 mW; single chip receiver; size 0.13 mum; standing-wave resonator; voltage 1.5 V; Antenna measurements; Clocks; Dipole antennas; Frequency synchronization; Oscillators; Phase locked loops; Radio frequency; Receiving antennas; Slot antennas; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits, 2008 IEEE Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4244-1804-6
Electronic_ISBN :
978-1-4244-1805-3
Type :
conf
DOI :
10.1109/VLSIC.2008.4585941
Filename :
4585941
Link To Document :
بازگشت