DocumentCode
2374826
Title
A direct conversion receiver adopting balanced three-phase analog system
Author
Yamaji, Takafumi ; Itakura, Tetsuro ; Ueno, Takeshi
Author_Institution
Corp. R&D Center, Toshiba Corp., Kawasaki
fYear
2008
fDate
18-20 June 2008
Firstpage
36
Lastpage
37
Abstract
A new wireless receiver architecture that has small analog area is proposed and evaluation of the core analog blocks is described. To reduce the analog area, a balanced 3-phase analog system is adopted and the functions of analog baseband filters and VGAs are moved to digital domain. The downconverter and ADC are directly connected and they occupy 0.28 mm2.
Keywords
analogue circuits; analogue-digital conversion; radio receivers; radiofrequency filters; ADC; analog baseband filters; core analog blocks; digital domain; direct conversion receiver; downconverter; three-phase analog system; wireless receiver architecture; CMOS technology; Circuit testing; Clocks; Digital filters; Feedback circuits; Output feedback; Phase shifters; Radio frequency; Research and development; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits, 2008 IEEE Symposium on
Conference_Location
Honolulu, HI
Print_ISBN
978-1-4244-1804-6
Electronic_ISBN
978-1-4244-1805-3
Type
conf
DOI
10.1109/VLSIC.2008.4585942
Filename
4585942
Link To Document