Title :
Large-scale read/write margin measurement in 45nm CMOS SRAM arrays
Author :
Guo, Zheng ; Carlson, Andrew ; Pang, Liang-Teck ; Duong, Kenneth ; Liu, Tsu-Jae King ; Nikolic, Borivoje
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Univ. of California, Berkeley, CA
Abstract :
Distributions of read and write noise margins in large CMOS SRAM arrays are investigated by directly measuring the bit-line current during bitline / wordline (write) or cell supply (read) voltage sweep in a 768 Kb 45 nm CMOS SRAM test-chip. Good correlation between write/read margin estimates through the bit-line measurements and the DC read SNM (RSNM) and IW measurements in small on-chip SRAM macros with wired-out storage nodes are demonstrated. Four common writeability metrics are correlated and compared. Array-level characterization of SRAM cell read stability and writeability allow fast and accurate characterization of high-density SRAM arrays is scalable for capturing up to 6 standard deviations of parameter variations.
Keywords :
CMOS memory circuits; SRAM chips; circuit testing; CMOS SRAM arrays; array-level characterization; bit-line current; parameter variations; read-write noise margins; voltage sweep; wired-out storage nodes; Current measurement; Electric variables measurement; Large-scale systems; Monitoring; Noise measurement; Random access memory; Semiconductor device measurement; Stability; Testing; Voltage;
Conference_Titel :
VLSI Circuits, 2008 IEEE Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4244-1804-6
Electronic_ISBN :
978-1-4244-1805-3
DOI :
10.1109/VLSIC.2008.4585944