Title :
An SC voltage regulator with novel area-efficient continuous output regulation by dual-branch interleaving control scheme
Author :
Su, Feng ; Ki, Wing-Hung ; Tsui, Chi-ying
Author_Institution :
Dept. of Electron. & Comput. Eng., Hong Kong Univ. of Sci. & Technol., Hong Kong
Abstract :
An integrated 1.8 V to 3.3 V regulated SC voltage regulator is present. The dual branches operate in an interleaving fashion for sake of the area-efficient continuous output regulation. Therefore the output voltage can be continuously regulated with small ripples. The design has been fabricated in a 0.35 mum CMOS process. By operating the prototype at switching frequency of 500 kHz and using an output capacitor of 2 muF, maximum output voltage ripple of 10 mV is maintained for output loading ranging from 10 mA to 180 mA. With the same configurations, a load regulation of 0.0043%/mA and a load transient of less than 25 us for a 150 mA current step are measured.
Keywords :
CMOS integrated circuits; load regulation; voltage regulators; CMOS process; SC voltage regulator; area-efficient regulation; continuous output regulation; dual-branch interleaving control; frequency 500 kHz; load regulation; load transient; size 0.35 mum; voltage 1.8 V to 3.3 V; CMOS process; Capacitors; Clocks; Driver circuits; Interleaved codes; Power transistors; Prototypes; Regulators; Switching frequency; Voltage control;
Conference_Titel :
VLSI Circuits, 2008 IEEE Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4244-1804-6
Electronic_ISBN :
978-1-4244-1805-3
DOI :
10.1109/VLSIC.2008.4585982
