DocumentCode :
2378602
Title :
Wafer/package test mix for optimal defect detection
Author :
Maxwell, Peter C.
fYear :
2002
fDate :
2002
Firstpage :
1050
Lastpage :
1055
Abstract :
This paper presents the results of an extensive data collection study where production wafer and package test data are examined from the point of view of determining an optimal mix of wafer and package tests to achieve the combined goals of high defect coverage and rapid yield learning, while simultaneously examining the possibility of using lower cost ATE. Results for at-speed tests show that for some types of parts reduced speed transition fault testing can be very effective.
Keywords :
application specific integrated circuits; fault diagnosis; integrated circuit packaging; integrated circuit testing; logic testing; production testing; ASIC; at-speed tests; data collection study; defect coverage; optimal defect detection; package test data; production wafer data; rapid yield learning; reduced speed transition fault testing; wafer/package test mix; Cost function; Frequency; Low voltage; Packaging machines; Production; Semiconductor device packaging; Semiconductor device testing; Temperature dependence; Temperature distribution; Temperature sensors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 2002. Proceedings. International
ISSN :
1089-3539
Print_ISBN :
0-7803-7542-4
Type :
conf
DOI :
10.1109/TEST.2002.1041861
Filename :
1041861
Link To Document :
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