• DocumentCode
    2379679
  • Title

    Recent Progress of Germanium Gate Stack Technology

  • Author

    Toriumi, Akira ; Lee, Choong Hyun ; Tabata, Toshiyuki ; Wang, Shengkai ; Zhao, Dandan ; Nishimura, Tomonori ; Kita, Koji ; Nagashio, Kosuke

  • Author_Institution
    Dept. of Mater. Eng., Univ. of Tokyo, Tokyo, Japan
  • fYear
    2012
  • fDate
    4-6 June 2012
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    Ge technology is obviously not new, but its recent progress is in marked contrast to the past research and is based on deep understanding of materials science in Ge (1). Ge CMOS is quite interesting not only from the high mobility but also from CMOS compactness rather than "III-V for n-MOS and Ge for p-MOS". From the EOT scalability viewpoint, sub-nm EOT gate stacks are required to keep the intrinsically high performance of Ge. GeOx-free gate stacks will be another advantage of Ge by choosing appropriate high-k dielectrics. Furthermore, we can expect versatile device opportunities and applications more suitable for Ge such as pure metal source/drain FETs or junction-less FETs.
  • Keywords
    CMOS integrated circuits; elemental semiconductors; germanium; high-k dielectric thin films; CMOS circuit; EOT gate stacks; EOT scalability viewpoint; Ge; Germanium Gate Stack Technology; high-k dielectrics; junctionless FET; metal source-drain FET; n-MOS type; p-MOS type; CMOS integrated circuits; Electron mobility; FETs; High K dielectric materials; Logic gates; MOSFET circuits; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Silicon-Germanium Technology and Device Meeting (ISTDM), 2012 International
  • Conference_Location
    Berkeley, CA
  • Print_ISBN
    978-1-4577-1864-9
  • Electronic_ISBN
    978-1-4577-1863-2
  • Type

    conf

  • DOI
    10.1109/ISTDM.2012.6222458
  • Filename
    6222458