Title :
Adaptive body bias for reducing impacts of die-to-die and within-die parameter variations on microprocessor frequency and leakage
Author :
Tschanz, J. ; Kao, J. ; Narendra, S. ; Nair, R. ; Antoniadis, D. ; Chandrakasan, A. ; Vivek De
Author_Institution :
Microprocessor Res. Labs, Intel Corp., Hillsboro, OR, USA
Abstract :
Measurements on a 150 nm CMOS test chip show that on-chip bidirectional adaptive body biasing compensates effectively for die-to-die parameter variation to meet both frequency and leakage requirements. An enhancement of this technique to correct for within-die variations triples the accepted die count in the highest frequency bin.
Keywords :
CMOS digital integrated circuits; microprocessor chips; 150 nm; CMOS chip; die count; die-to-die parameter variations; microprocessor frequency; microprocessor leakage; on-chip bidirectional adaptive body bias; within-die parameter variations; CMOS technology; Circuit testing; Clocks; Counting circuits; Delay; Frequency measurement; MOS devices; Microprocessors; Phase detection; Phase frequency detector;
Conference_Titel :
Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7335-9
DOI :
10.1109/ISSCC.2002.993112
