Title :
Memory design using one-transistor gain cell on SOI
Author :
Ohsawa, T. ; Fujita, K. ; Higashi, T. ; Iwata, Y. ; Kajiyama, T. ; Asao, Y. ; Sunouchi, K.
Author_Institution :
Memory Division, Toshiba Corporation Semiconductor Company
Keywords :
Design engineering; Hardware; Large scale integration; Logic arrays; Microelectronics; Performance gain; Random access memory; Research and development; Signal processing; Voltage;
Conference_Titel :
Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7335-9
DOI :
10.1109/ISSCC.2002.993125