Numerical study of interfacial delamination in a system-on-package (SOP) integrated substrate under thermal loading

Research on system-on-package (SOP) with integrated substrate is being pursued at Georgia Tech. The integrated substrate contains embedded thin-film passive components in a multilayered substrate to achieve higher performance, lower cost, smaller size and lighter weight. However, as in all multilayered structures, SOP integrated substrate could have higher interfacial stresses and therefore could have interfacial delamination induced by material properties mismatch under thermal loading, if not carefully designed and fabricated. In this study, numerical analyses have been performed to investigate interfacial delamination propagation in SOP integrated substrate under thermal loading. Three candidate base layer materials and two dielectric layer materials have been studied. Recommendations for reducing delamination propagation were suggested. Further study is being conducted to investigate effects of time and temperature dependent material properties and cyclic thermal loading conditions