DocumentCode :
2390386
Title :
Relationship between TDDB testing and wafer level ramped QBD testing using both fixed current and current density stressing
Author :
Mullen, Ed ; Leveugle, Claire ; Molyneaux, James ; Prendergast, James ; Suehle, John S.
Author_Institution :
Analog Devices, Limerick, Ireland
fYear :
2001
fDate :
2001
Firstpage :
74
Lastpage :
77
Abstract :
Over the years various tests have been proposed for measuring the dielectric integrity of gate oxide. The duration of these tests can range from seconds to hours depending on the conditions used. Reliability purists maintain that the longer the test duration the more accurate the reliability prediction will be. Given that today´s technologies are changing rapidly, it is not possible to devote large amounts of time to reliability testing. Therefore, wafer level tests are being used more and more often (as opposed to the lengthy package level TDDB test) to qualify wafer fabrication foundries. This paper investigates two types of wafer level ramped current QBD testing together with the package level constant voltage TDDB test. This paper provides a thorough investigation into the oxide area dependence for both QBD and TDDB tests. Finally, this paper investigates the potential correlation between the QBD and TDDB tests
Keywords :
dielectric measurement; electric breakdown; reliability; testing; TDDB testing; current density stress; dielectric integrity; fixed current stress; gate oxide; reliability testing; wafer level ramped QBD testing; Capacitors; Current density; Design for quality; Manufacturing processes; Packaging; Performance evaluation; Temperature; Testing; Voltage; Wafer scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Integrated Reliability Workshop Final Report, 2001. 2001 IEEE International
Conference_Location :
Lake Tahoe, CA
Print_ISBN :
0-7803-7167-4
Type :
conf
DOI :
10.1109/.2001.993921
Filename :
993921
Link To Document :
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