A high-efficiency CMOS rectifier for low-power RFID tags

In this paper, a high-efficiency highly sensitive CMOS rectifier for radio-frequency identification (RFID) tags is presented. Although the minimum RF input signal amplitude for which the rectifier operates properly is lower than the standard threshold voltage of the MOS transistors, the design uses only standard-threshold-voltage (standard-V_th) devices. Furthermore, two rectifier biasing schemes are proposed. The first biasing scheme is intended for semi-passive RFID tags and allows the tag rectifier to adjust the input power level at which the rectifier´s maximum power efficiency is achieved, i.e., the rectifier circuit can be tuned to achieve its maximum power efficiency at any given input power. The second biasing scheme is for self-sufficient rectifiers used in passive tags and does not require any auxiliary power source. The rectifier is designed and laid out in a standard 0.13-¿m CMOS process and its performance is confirmed through post-layout simulations.