DocumentCode
2390519
Title
Suppression of lateral charge redistribution using advanced impurity trap memory for improving high temperature retention
Author
Sunamura, Hiroshi ; Ikarashi, Taeko ; Morioka, Ayuka ; Kotsuji, Setsu ; Oshida, Makiko ; Ikarashi, Nobuyuki ; Fujieda, Shinji ; Watanabe, Hirohito
Author_Institution
Syst. Devices Res. Labs., NEC Corp., Kanagawa
fYear
2006
fDate
11-13 Dec. 2006
Firstpage
1
Lastpage
4
Abstract
For retention improvement in scaled SONOS-type nonvolatile memory, deep traps with controllable density were formed by adding metal impurities into gate oxide. We find that Ti additives create deep traps in silicon dioxide, with high electron capture efficiency Charge storage node changed from TiO2 floating-gate (15Aring) to nano-crystals (3Aring), and further to atomic-sized traps (0.4Aring) by decreasing Ti amount. Discrete atomic-sized traps successfully suppressed lateral charge redistribution, improving retention at 150degC
Keywords
electron traps; random-access storage; silicon compounds; titanium compounds; 150 C; SONOS; SiO2; TiO2; deep traps; high temperature retention; impurity trap memory; lateral charge redistribution; nonvolatile memory; Additives; Dielectrics; Electron traps; Gold; Hafnium; Impurities; Nonvolatile memory; SONOS devices; Silicon compounds; Temperature;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 2006. IEDM '06. International
Conference_Location
San Francisco, CA
Print_ISBN
1-4244-0439-8
Electronic_ISBN
1-4244-0439-8
Type
conf
DOI
10.1109/IEDM.2006.346949
Filename
4154384
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