Evolution of bootstrap techniques in low-voltage CMOS digital VLSI circuits for SOC applications

Author

Kuo, James B.

Author_Institution

Sch. of Eng. Sci., Simon Fraser Univ., Burnaby, BC, Canada

fYear

2005

fDate

20-24 July 2005

Firstpage

143

Lastpage

148

Abstract

This paper reports the evolution of the bootstrap techniques in low-voltage CMOS digital VLSI circuits in the past. Combining bootstrap and DTMOS techniques, low-voltage CMOS digital VLSI circuits using a very low power supply voltage such as 0.5V have been developed for low-power SOC applications.

Keywords

CMOS digital integrated circuits; VLSI; bootstrap circuits; low-power electronics; system-on-chip; 0.5 V; DTMOS technique; VLSI circuit; bootstrap technique; low power supply voltage; low-voltage CMOS digital circuit; system-on-chip; CMOS digital integrated circuits; CMOS logic circuits; CMOS technology; Capacitors; Driver circuits; Logic circuits; Low voltage; Power supplies; Threshold voltage; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

System-on-Chip for Real-Time Applications, 2005. Proceedings. Fifth International Workshop on

Print_ISBN

0-7695-2403-6

Type

conf

DOI

10.1109/IWSOC.2005.59

Filename

1530931

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2390535