A 31µW ask clock and data recovery circuit for wireless implantable systems

Amplitude shift keying (ASK) and pulse position modulation (PPM) can be used to provide self-synchronized data and clock for wireless implantable neural recoding systems, and therefore simplifies the complexity of the implanted circuits. In this paper, a novel extremely low power receiver designed for such a scheme is discussed. The integrated receiver utilizes inductive load implemented by PMOS device to boost the voltage gain of the front end amplifier. A charge-pump based CDR circuit is utilized to extract the clock and non-return-to-zero (NRZ) data directly from the demodulated waveform, and the required reference voltage is adaptively generated to cover a large data rate range. The receiver design is validated using 0.25 μm CMOS technology. It exhibits a sensitivity of ~1mV at 1.5MHz, covers an input data rate between 7kbit/s and 45.5kbit/s, and consumes only ~31 μW of power.