DocumentCode :
2391199
Title :
High level extraction of SoC architectural information from generic C algorithmic descriptions
Author :
Mattavelli, Marco ; Ravasi, Massimo
Author_Institution :
Signal Process. Inst., Swiss Fed. Inst. of Technol. of Lausanne, Switzerland
fYear :
2005
fDate :
20-24 July 2005
Firstpage :
304
Lastpage :
307
Abstract :
The complexity of nowadays, algorithms in terms of number of lines of codes and cross-relations among processing algorithms that are activated by specific input signals, goes far beyond what the designer can reasonably grasp from the "pencil and paper" analysis of the (software) specifications. Moreover, depending on the implementation goal different measures and metrics are required at different steps of the implementation methodology or design flow of SoC. The process of extracting the desired measures needs to be supported by appropriate automatic tools, since code rewriting, at each design stage, may result resource consuming and error prone. This paper presents an integrated tool for automatic analysis capable of producing complexity results based on rich and customizable metrics. The tool is based on a C virtual machine that allows extracting from any C program execution the operations and data-flow information, according to the defined metrics. The tool capabilities include the simulation of virtual memory architectures.
Keywords :
C language; circuit simulation; high level synthesis; integrated circuit design; system-on-chip; C virtual machine; SoC architectural information; automatic analysis; automatic tools; code rewriting; data-flow information; design flow; generic C algorithmic descriptions; high level extraction; processing algorithms; software specifications; system-on-chip; virtual memory architectures; Algorithm design and analysis; Data mining; Design methodology; Fluid flow measurement; Memory architecture; Signal analysis; Signal design; Signal processing; Software algorithms; Virtual machining;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
System-on-Chip for Real-Time Applications, 2005. Proceedings. Fifth International Workshop on
Print_ISBN :
0-7695-2403-6
Type :
conf
DOI :
10.1109/IWSOC.2005.71
Filename :
1530961
Link To Document :
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