DocumentCode
2391718
Title
Design of a 0.13µm CMOS front-end for 4.5–5.5GHz radar sensor chip
Author
Liang, Yuan
Author_Institution
State Key Discipline Lab. of Wide Band Gap Semicond. Technol., Xidian Univ., Xi´´an, China
fYear
2012
fDate
19-20 May 2012
Firstpage
1298
Lastpage
1305
Abstract
This paper addresses the problem of 4.5-5.5GHz direct-conversion front-end design in a SOC-based radar sensor chip for vital signal detection. The front-end is characterized by a broadband low noise amplifier (LNA) and a PMOS switching-type double-balanced mixer. The LNA and the mixer co-design introduces both noise cancellation topology and linearization technology, obtaining input matching, noise suppression and IIP3 enhancement simultaneously at carried 5GHz. The current density of the transconductance stage is dictated transcendentally, and ensured by thermal robustness bias circuitry. Stack bias circuitry is considered to suppress flicker noise. The maximum conversion gain (CG), IIP3 and minimum double-sideband noise figure is 20.7dB, 8.58dBm, 7.9dB, respectively. The voltage control oscillator (VCO) is tunable between 4.5-5.5GHz with phase noise below -120dBc/Hz at 1MHz offset. The best phase noise at 1MHz offset is -132dBc/Hz, given that the front end consumes 40mW from 1.2V supply.
Keywords
CMOS integrated circuits; MOS integrated circuits; current density; flicker noise; low noise amplifiers; mixers (circuits); radar detection; system-on-chip; voltage-controlled oscillators; 13μm CMOS front-end; 5GHz direct-conversion front-end design; IIP3 enhancement; PMOS switching-type double-balanced mixer; SOC-based radar sensor chip; broadband low noise amplifier; conversion gain; current density; flicker noise suppression; frequency 1 MHz; frequency 4.5 GHz to 5.5 GHz; linearization technology; minimum double-sideband noise figure; mixer co-design; noise cancellation topology; noise figure 20.7 dB to 7.9 dB; noise suppression; phase noise; size 0.13 mum; stack bias circuitry; thermal robustness bias circuitry; transconductance stage; vital signal detection; voltage 1.2 V; voltage control oscillator; 1f noise; Impedance matching; Mixers; Switches; Transconductance; Voltage-controlled oscillators; Computer-aided design; LNA; Linearizatrion; Mixer; Noise cancellation; Radar sensor chip; Solid-state components and circuits; VCO;
fLanguage
English
Publisher
ieee
Conference_Titel
Systems and Informatics (ICSAI), 2012 International Conference on
Conference_Location
Yantai
Print_ISBN
978-1-4673-0198-5
Type
conf
DOI
10.1109/ICSAI.2012.6223273
Filename
6223273
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