Title :
Experimental results for single test point insertion using testability analysis
Author :
Vongpradhip, Sartid ; Ginige, Athula
Author_Institution :
Sch. of Electr. Eng., Univ. of Technol., Sydney, NSW, Australia
Abstract :
In this paper a new scheme to find methods for test point insertion, into combinational logic circuits, using testability values from testability analysis is proposed. Exhaustive simulation is done by placing an insertion line into every node in the circuit one at a time. Fault coverage is noted before and after the insertion. A few testability analysis techniques e.g. SCOAP and our modified distance techniques are used. The experiment is carried out to see which testability analysis technique could select an insertion line that would give the optimum fault coverage compared to the results from the simulation. The ISCAS85 benchmark circuits are used as the basis for the comparison. The insertion could be useful when there are few spare pins on an IC package and if we wanted to use them as insertion lines to improve testability of the circuit. The results showed that the distance techniques gave the best improvement in fault coverage
Keywords :
circuit analysis computing; combinational circuits; digital simulation; logic testing; IC package; ISCAS85 benchmark circuits; SCOAP; circuit testability; combinational logic circuits; distance techniques; exhaustive simulation; fault coverage; insertion line; integrated circuit package; simulation; single test point insertion; testability analysis; testability analysis techniques; testability values; Analytical models; Benchmark testing; Circuit faults; Circuit simulation; Circuit testing; Combinational circuits; Integrated circuit packaging; Integrated circuit testing; Logic testing; Pins;
Conference_Titel :
TENCON '94. IEEE Region 10's Ninth Annual International Conference. Theme: Frontiers of Computer Technology. Proceedings of 1994
Print_ISBN :
0-7803-1862-5
DOI :
10.1109/TENCON.1994.369197
