• DocumentCode
    2392398
  • Title

    A single-phase energy metering SoC with IAS-DSP and ultra low power metering mode

  • Author

    Zhao, Yan ; Tan, Nianxiong ; Yang, Kun ; Zhong, Shupeng ; Men, Changyou

  • Author_Institution
    Sch. of Electr. Eng., Zhejiang Univ., Hangzhou, China
  • fYear
    2011
  • fDate
    26-28 Sept. 2011
  • Firstpage
    354
  • Lastpage
    358
  • Abstract
    A single-phase energy metering SoC in TSMC 0.25um mixed-mode embedded FLASH technology is designed. While integrating four channel sigma-delta ADCs, PLL, oscillation circuit, regulators, temperature sensor, 8-bit CPU core, 32K byte FLASH memory, 1K byte SRAM memory, energy metering engine, and various on-chip peripherals, a small die size is achieved due to the implement of an 32-bit fixed-point Instruction and Architecture Specific DSP (IAS-DSP) to conduct the carefully designed multi-rate energy metering algorithm. To satisfy critical power restrictive applications, several ultra low power metering modes are designed. With these modes and the IAS-DSP, there is only about 100uA current dissipation while metering accuracy still meets industrial standards. The experimental results also prove excellent EMI rejection features. The chip is currently in production and millions has been shipped.
  • Keywords
    SRAM chips; analogue-digital conversion; digital signal processing chips; flash memories; phase locked loops; power integrated circuits; power meters; system-on-chip; CPU core; EMI rejection; FLASH memory; IAS-DSP; PLL; SRAM memory; TSMC mixed-mode embedded FLASH technology; channel sigma-delta ADC; energy metering engine; fixed-point instruction and architecture specific DSP; industrial standards; memory size 1 KByte; memory size 32 KByte; multirate energy metering algorithm; on-chip peripherals; oscillation circuit; regulators; single-phase energy metering SoC; size 0.25 mum; temperature sensor; ultra low power metering mode; word length 32 bit; word length 8 bit; Clocks; Frequency measurement; Logic gates; Phase locked loops; System-on-a-chip; DSP; Energy Metering; Low power; SoC;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOC Conference (SOCC), 2011 IEEE International
  • Conference_Location
    Taipei
  • ISSN
    2164-1676
  • Print_ISBN
    978-1-4577-1616-4
  • Electronic_ISBN
    2164-1676
  • Type

    conf

  • DOI
    10.1109/SOCC.2011.6085091
  • Filename
    6085091