Title :
Nano, quantum, and molecular computing: are we ready for the validation and test challenges?
Author :
Shukla, Sandeep K. ; Karri, Ramesh ; Goldstein, Seth Copen ; Brewer, Forrest ; Banerjee, Kunal ; Basu, Sankar
Author_Institution :
Bradley Sch. of Electr. & Comput. Eng., Virginia Tech, Blacksburg, VA, USA
Abstract :
In the recent years a lot of research effort is being spent in the areas of nanotechnology, quantum computation, and biologically inspired computing. As we are faced with various challenges regarding their implementability, architectural visions, and design automation, not much has been done in the field of high level design and validation in looking further into the future, and ponder about the state of the art in design validation and test in such miniscule technology era. Very few reported research work have surfaced on the design and validation challenges for these technologies. However, this certainly is a matter of concern because the technology of the small will be ridden with random faults and hence architectural design strategies need to change to take into account these stochastic models of failures to build robust designs. Validation of such designs also have to capture the stochastic behavioral models of the technology, and hence traditional validation and testing techniques will not work directly. Are we getting ready with our theory; technology and tools to address these challenges? This futuristic panel asks technology and computer aided design experts, as well as finding agency program managers questions about the technological barriers to be surpassed, as well as how the funding agencies such as NSF are ramping up for this technological future.
Keywords :
design for testability; electronic design automation; high level synthesis; molecular electronics; nanoelectronics; quantum computing; redundancy; architectural design strategies; behavioral models; biologically inspired computing; computer aided design; design automation; high level design; molecular computing; nano computing; quantum computation; random faults; stochastic models; test challenges; validation challenges; Computer science; Design engineering; Manufacturing; Molecular computing; Nanoscale devices; Probability; Quantum computing; Redundancy; Stochastic processes; Testing;
Conference_Titel :
High-Level Design Validation and Test Workshop, 2003. Eighth IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-8236-6
DOI :
10.1109/HLDVT.2003.1252467