Performance analysis of cache-based systems

A simulation of the performance of cache based general purpose multitasking multiprocessor systems is analyzed with simple throughput models. A private cache is associated with each processor, with multiple buses connecting the processors to the shared, interleaved memory. Simple models based on dynamic instruction mix statistics are introduced to evaluate upper bounds on the throughput when independent tasks are run on each processor. With these models, one can obtain a first estimate of the MIPS rate of a multiprocessor system. The major emphasis is on the combined effect of line and cache sizes on the hit ratio and thus on the overall performance