DocumentCode
2393316
Title
Genetic algorithms: the philosopher´s stone or an effective solution for high-level TPG?
Author
Fin, Alessandro ; Fummi, Franco
Author_Institution
Dipt. di Inf., Verona Univ., Italy
fYear
2003
fDate
12-14 Nov. 2003
Firstpage
163
Lastpage
168
Abstract
The paper examines the potentialities of genetic algorithms (GAs) with respect to the development of high-level TPGs. It summarizes at first the most relevant test pattern generation techniques based on genetic algorithms (GAs). This analysis distinguishes the considered techniques with respect to the abstraction level of the design under test. In particular, the effectiveness of gate-level GA-based TPGs is compared with the effectiveness of high-level GA-based TPGs. Differences are deeply investigated. They mainly concern the way genetic operators exploit specific simulation information to heuristically guide the genetic evolution. Moreover, a functional testing framework is described and used to actually measure on high-level descriptions the effectiveness of sophisticated GA-based TPGs in comparison to random approaches. Results are reported on a variety of benchmarks.
Keywords
VLSI; automatic test pattern generation; fault simulation; genetic algorithms; high level synthesis; VLSI designs; abstraction level; design under test; fast simulator; fault model; functional testing framework; genetic algorithms; genetic operators; high-level TPG; test pattern generation techniques; Circuit faults; Circuit simulation; Circuit testing; Engines; Flip-flops; Genetic algorithms; Logic testing; Noise measurement; Search problems; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
High-Level Design Validation and Test Workshop, 2003. Eighth IEEE International
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-7803-8236-6
Type
conf
DOI
10.1109/HLDVT.2003.1252491
Filename
1252491
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