• DocumentCode
    2393718
  • Title

    Impacts of hole trapping on the NBTI degradation and recovery in PMOS devices

  • Author

    Lin, H.-C. ; Lee, D.-Y. ; Ou, S.-C. ; Chien, C.-H. ; Huang, T.-Y.

  • Author_Institution
    Nat.Nano Device Labs., Hsin-Chu, Taiwan
  • fYear
    2003
  • fDate
    6-7 Nov. 2003
  • Firstpage
    76
  • Lastpage
    79
  • Abstract
    In this paper, impacts of hole trapping on the negative bias temperature instability (NBTI) degradation and recovery in PMOS devices was investigated. Dual-gate p- and n-channel MOSFETs were fabricated using a standard CMOS twin-well technology.
  • Keywords
    MOSFET; hole traps; recovery; stress relaxation; PMOS devices; hole trapping; n-channel MOSFET; negative bias temperature instability degradation; p-channel MOSFET; recovery; CMOS technology; Degradation; Dielectrics; Interface states; MOS devices; Niobium compounds; Nitrogen; Stress; Temperature; Titanium compounds;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Gate Insulator, 2003. IWGI 2003. Extended Abstracts of International Workshop on
  • Conference_Location
    Toyko, Japan
  • Print_ISBN
    4-89114-037-2
  • Type

    conf

  • DOI
    10.1109/IWGI.2003.159188
  • Filename
    1252513
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2393718