Leakage in nanometer scale CMOS circuits

Author

Mukhopadhyay, Saibal ; Mahmoodi-Meimand, Hamid ; Neau, Cassandra ; Roy, Kaushik

Author_Institution

Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA

fYear

2003

fDate

2003

Firstpage

307

Lastpage

312

Abstract

High leakage current in deep sub-micron regimes is a significant contributor to the power dissipation of CMOS circuits as the CMOS technology scales down. Consequently, the identification and modeling of different leakage components is very important for estimation and reduction of leakage power, especially for low power applications. This paper explores transistor leakage mechanisms and device and circuit techniques to reduce leakage power consumption.

Keywords

CMOS integrated circuits; MOSFET; leakage currents; semiconductor device models; complementary metal oxide semiconductor; deep submicron regimes; leakage components identification; leakage components modeling; leakage current; leakage power consumption reduction; nanometer scale CMOS circuits; power dissipation; transistor leakage mechanisms; CMOS technology; Circuits; Doping profiles; Electrons; Energy consumption; Leakage current; MOSFETs; Subthreshold current; Threshold voltage; Tunneling;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, Systems, and Applications, 2003 International Symposium on

ISSN

1524-766X

Print_ISBN

0-7803-7765-6

Type

conf

DOI

10.1109/VTSA.2003.1252615

Filename

1252615

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2395552