DocumentCode
2401152
Title
Defect reduction in ArF immersion lithography, using particle trap wafers with CVD thin films
Author
Matsui, Yoshinori ; Onoda, Naka ; Nagahara, Seiji ; Uchiyama, Takayuki
Author_Institution
NEC Electron. Corp., Sagamihara, Japan
fYear
2009
fDate
10-12 May 2009
Firstpage
237
Lastpage
240
Abstract
Particle trap wafers were applied to ArF immersion lithography to reduce the immersion related defectivity. Interfacial free energy (gamma) and work of adhesion (W) between particle trap wafers and particles in immersion water explain the potential of trapping particles by the particle trap wafers. It was also found that the treated SiCN CVD wafer performed well as a particle trap wafer and may help defect reduction in immersion lithography.
Keywords
CVD coatings; argon compounds; free energy; immersion lithography; silicon compounds; surface energy; ArF; CVD thin films; CVD wafer; SiCN; defect reduction; immersion lithography; immersion water; interfacial free energy; particle trap wafers; trapping particle potential; Cleaning; Electron traps; Equations; Goniometers; Lithography; Particle measurements; Pollution measurement; Resists; Testing; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Semiconductor Manufacturing Conference, 2009. ASMC '09. IEEE/SEMI
Conference_Location
Berlin
ISSN
1078-8743
Print_ISBN
978-1-4244-3614-9
Electronic_ISBN
1078-8743
Type
conf
DOI
10.1109/ASMC.2009.5155991
Filename
5155991
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