DocumentCode
24018
Title
Compact Hardware Implementations of ChaCha, BLAKE, Threefish, and Skein on FPGA
Author
At, N. ; Beuchat, Jean-Luc ; Okamoto, Eiji ; San, Ismail ; Yamazaki, Tsutomu
Author_Institution
Dept. of Electr. & Electron. Eng., Anadolu Univ., Eskişehir, Turkey
Volume
61
Issue
2
fYear
2014
fDate
Feb. 2014
Firstpage
485
Lastpage
498
Abstract
The cryptographic hash functions BLAKE and Skein are built from the ChaCha stream cipher and the tweakable Threefish block cipher, respectively. Interestingly enough, they are based on the same arithmetic operations, and the same design philosophy allows one to design lightweight coprocessors for hashing and encryption. The key element of our approach is to take advantage of the parallelism of the algorithms considered in this work to deeply pipeline our Arithmetic and Logic Units, and to avoid data dependencies by interleaving independent tasks. We show for instance that a fully autonomous implementation of BLAKE and ChaCha on a Xilinx Virtex-6 device occupies 144 slices and three memory blocks, and achieves competitive throughputs. In order to offer the same features, a coprocessor implementing Skein and Threefish requires a substantial higher slice count.
Keywords
coprocessors; cryptography; field programmable gate arrays; BLAKE function; ChaCha stream cipher; FPGA; Skein function; Threefish block cipher; Xilinx Virtex-6 device; algorithm parallelism; arithmetic operations; arithmetic-and-logic units; competitive throughput; cryptographic hash functions; data dependencies; encryption; field programmable gate array; lightweight coprocessors; memory blocks; slice count; Ciphers; Coprocessors; Encryption; Field programmable gate arrays; Hardware; Pipelines; Ciphers; cryptography, coprocessors; field programmable gate arrays;
fLanguage
English
Journal_Title
Circuits and Systems I: Regular Papers, IEEE Transactions on
Publisher
ieee
ISSN
1549-8328
Type
jour
DOI
10.1109/TCSI.2013.2278385
Filename
6607237
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