DocumentCode
2403221
Title
Development of a Face Recognition System on an Image Processing LSI Chip
Author
Kozakaya, Tatsuo ; Nakai, Hiroaki
Author_Institution
Toshiba Corporation, Japan
fYear
2004
fDate
27-02 June 2004
Firstpage
86
Lastpage
86
Abstract
We present a real-time and high-precision face recognition system using an image processing LSI chip:Visconti[Visconti: Multi-VLIW Image Recognition Processor]. The system is compact and operates at low power, making it suitable for many purposes, including home security and robot vision. The LSI includes three media processing modules and peripherals which are suitable for machine vision. Face recognition is based on the constrained mutual sub-space method (CMSM), implemented on the LSI and optimized to make the best use of the hardware features. The optimization consists of four different levels: instruction, data, task and algorithm. It shows possible implementation of face recognition with multi-core CPUs or other LSI chips. Experimental results show the system operates at 20 frames/sec and a recognition rate is 99.59% when a threshold value is set to 0.55; performance comparable to that of a state-of-the-art system.
Keywords
Constraint optimization; Face recognition; Image processing; Image recognition; Large scale integration; Machine vision; Power system security; Real time systems; Robot vision systems; Subspace constraints;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Vision and Pattern Recognition Workshop, 2004. CVPRW '04. Conference on
Type
conf
DOI
10.1109/CVPR.2004.48
Filename
1384879
Link To Document