Title :
Circuit and Architectural Optimization of Static Memories
Author :
Eisele, Veronika ; Schmitt-Landsiedel, Doris
Author_Institution :
Siemens AG, Munich, Germany
Abstract :
A new CAD environment for the design optimization of static RAMs has been developped. The optimal memory architecture is determined in varying the segmentation of the cell array. Optimal decoding and sensing circuits are chosen from a library. Transistor dimensions are optimized with respect to delay, area and power using analytical optimization techniques. The methods can be applied to all kinds of RAMs, significantly improving the efficiency and flexibility of the memory design process.
Keywords :
SRAM chips; circuit CAD; circuit optimisation; CAD environment; architectural optimization; cell array segmentation; memory design process; optimal memory architecture; sensing circuits; static RAM; static memories; transistor dimensions; Circuits; Decoding; Delay; Design automation; Design optimization; Libraries; Memory architecture; Performance analysis; Process design; Random access memory;
Conference_Titel :
Solid-State Circuits Conference, 1992. ESSCIRC '92. Eighteenth European
Conference_Location :
Copenhagen
Print_ISBN :
87-984232-0-7
DOI :
10.1109/ESSCIRC.1992.5468385
