Organizing design alternatives using VHDL configurations

Efficient management of design alternatives is not only desirable in searching for optimal solutions for a given design task, but crucial for maintenance and reuse of existing design bases. A methodology for organizing alternatives, based on the VHDL (VHSIC hardware description language) construct configuration, is presented. The language basics of the VHDL configuration are reviewed. Different forms of configurations and their characteristics are identified. A scheme of presenting configurations as graphic symbols is outlined. The use of configuration in circuit construction is classified into three categories. A methodology is then presented for organizing design alternatives in the VHDL design environment. An adder design example is used to illustrate some of the key features of the methodology.<>