Laser scattering characterization of SOI wafers: real threshold assessment and sizing accuracy

SOI material is now established as the substrate of choice for advanced microprocessors applications, pushing SOI technology to ultrathin layers and high volume production. According to 2001 ITRS roadmap, one can see that 65 nm and even 45 nm are the critical defect size to be detected when meeting the 90 nm node for defect monitoring. This paper focusses on the challenges encountered with SOI wafers in terms of small defect detection and sizing accuracy. Inspection strategy with the latest generation inspection tool is also discussed in order to close the gap between actual production and industry requirements.