DocumentCode :
2407463
Title :
A VLSI based logic analyzer interface for a microprocessor development system
Author :
Lee, B.H. ; Makki, R.Z. ; Rohe, C.
Author_Institution :
North Carolina Univ., Charlotte, NC, USA
fYear :
1991
fDate :
10-12 Mar 1991
Firstpage :
101
Lastpage :
105
Abstract :
The VLSI-based design of a low-cost logic analyzer for a PC is presented. Despite its growing popularity, the general purpose analyzer has limitations caused by the complexity of operation and high cost. The analyzer has been designed for improved performance. It has 16 channels of acquisition data backed by a maximum rate of 25 MHz and 4 K deep memory. The special features of the design include self-test pattern generation and acquisition memory pattern search. CMOS technology has been used in the physical design of the analyzer
Keywords :
CMOS integrated circuits; VLSI; computer interfaces; data acquisition; logic analysers; 25 MHz; 4 kByte; CMOS; VLSI; acquisition memory pattern search; data acquisition; design; logic analyzer interface; microprocessor development system; self-test pattern generation; CMOS logic circuits; CMOS technology; Displays; Logic design; Microprocessors; Performance analysis; Probes; Registers; Signal analysis; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
System Theory, 1991. Proceedings., Twenty-Third Southeastern Symposium on
Conference_Location :
Columbia, SC
ISSN :
0094-2898
Print_ISBN :
0-8186-2190-7
Type :
conf
DOI :
10.1109/SSST.1991.138523
Filename :
138523
Link To Document :
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