Minimizing the cost of repairing WSI memories

An approach to the repair of wafer-scale integration (WSI) memory chips with redundancy is proposed. This approach is based on the minimization of repair cost. Algorithms for cost-driven repair are presented. The algorithms can be executed either online (concurrently with the testing of the memory), or offline (at completion of testing). Analytical expressions for the repair cost under both these circumstances are given and proved. The algorithms are also perfect in the sense that they can correctly diagnose a repairable/unrepairable WSI memory and find the optimal repair solution. Simulation results suggest that repair-time must be considerably larger than testing time for an online algorithm to be economically feasible