DocumentCode
2410455
Title
An inter-task real time DVFS scheme for multiprocessor embedded systems
Author
Bhatti, Muhammad Khurram ; Belleudy, Cecile ; Auguin, Michel
Author_Institution
LEAT Res. Lab., Univ. of Nice-Sophia Antipolis, Nice, France
fYear
2010
fDate
26-28 Oct. 2010
Firstpage
136
Lastpage
143
Abstract
In this paper, we have addressed energy-efficient scheduling of real time applications intended to be executed on multiprocessor systems. Our proposed technique, called Deterministic Stretch-to-Fit (DSF) technique, is based on inter-task real time dynamic voltage and frequency scaling (RT-DVFS). It mainly comprises of three components. Firstly, we propose an online algorithm to reclaim energy by adapting to the variations in actual workload of target application tasks. Secondly, we extend our online algorithm with an adaptive and speculative speed adjustment mechanism. This mechanism anticipates early completion of future task instances based on the information of their average workload. Thirdly, we propose a one-task extension technique for multi-task multiprocessor systems. No real time constraints of target application are violated while applying our proposed technique. Simulation results show that our online slack reclamation algorithm alone gives up to 53% gains on energy consumption and our extended speculative speed adjustment mechanism, along with the one-task extension technique, gives additional gains, reaching a theoretical low-bound on the scalable frequency and voltage.
Keywords
embedded systems; multiprocessing systems; power aware computing; processor scheduling; deterministic stretch to fit technique; energy consumption; energy efficient scheduling; frequency scaling; inter task real time dynamic voltage; multi-task multiprocessor systems; multiprocessor embedded system; one task extension technique; speculative speed adjustment; Dynamic scheduling; Heuristic algorithms; Optimal scheduling; Processor scheduling; Real time systems; Schedules; Energy-efficient scheduling; Power consumption; RT-DVFS; Real time systems; Scheduling;
fLanguage
English
Publisher
ieee
Conference_Titel
Design and Architectures for Signal and Image Processing (DASIP), 2010 Conference on
Conference_Location
Edinburgh
Print_ISBN
978-1-4244-8734-9
Electronic_ISBN
978-1-4244-8733-2
Type
conf
DOI
10.1109/DASIP.2010.5706257
Filename
5706257
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